A flip chip is generally a monolithic semiconductor device, such as an integrated circuit, having bead-like terminals formed on one surface of the chip. The terminals, also referred to as solder bumps, serve to both secure the chip to a circuit board and electrically interconnect the flip chip's circuitry to a conductor pattern formed on the circuit board, which may be a ceramic substrate, printed wiring board, flexible circuit, or a silicon substrate.
A prior art flip chip 10 and its terminal pattern are shown in FIG. 1. Due to the numerous functions typically performed by the microcircuitry of a flip chip 10, a relatively large number of solder bumps 12 are required. As shown in FIG. 2, each solder bump 12 is located at the perimeter of the flip chip 10 on an electrically conductive pad 16 that is electrically interconnected with the circuitry on the flip chip 10. Due to the manner in which the solder bumps 12 are formed, the solder bumps 12 are significantly wider than their pads 16, as can be seen in FIG. 2. The size of a typical flip chip 10 is generally on the order of a few millimeters per side, resulting in the solder bumps 12 being crowded along the perimeter of the flip chip 10. As a result, flip chip conductor patterns (not shown) are typically composed of numerous individual conductors, often spaced on the order of about 0.2 millimeter apart.
Because of the narrow spacing required for the solder bumps and conductors, soldering a flip chip to its conductor pattern requires a significant degree of precision. Reflow solder techniques are widely utilized in the soldering of flip chips. Such techniques typically involve forming solder bumps on the surface of the flip chip using methods such as electrodeposition, by which a quantity of solder can be accurately deposited. Heating the solder above its melting temperature serves to form the characteristic solder bumps. The chip is then soldered to the conductor pattern by registering the solder bumps with their respective conductors and reheating, or reflowing, the solder so as to metallurgically bond the chip to the conductor pattern, and thereby electrically interconnect each of the solder bumps with its corresponding conductor.
Deposition and reflow of the solder must be precisely controlled not only to coincide with the spacing of the terminals and the size of the conductors, but also to control the height of the solder bumps after soldering. As is well known in the art, controlling the height of solder bumps after reflow is necessary in order to prevent the surface tension of the molten solder bumps from drawing the flip chip excessively close to the substrate during the reflow operation. Sufficient spacing between the chip and its substrate is necessary for enabling stress relief during thermal cycles, allowing penetration of cleaning solutions for removing undesirable residues, and enabling the penetration of mechanical bonding and encapsulation materials between the chip and the substrate.
Solder bump height is generally controlled by limiting the amount of solder deposited to form the solder bump 12 and/or by limiting the surface area over which the solder bump 12 is allowed to reflow. As illustrated in FIG. 2, one such approach involves the use of a solderable contact 14 bonded to the pad 16 located at the flip chip's perimeter. The contact 14 contacts the pad 16 through an opening 20 formed in a passivation layer 22 that is conventionally provided on the flip chip's substrate 24. The pad 16 is typically composed of aluminum while the solder bump 12 is generally composed of a tin-lead alloy. Therefore, to promote adhesion between the solder bump 12 and the pad 16, the contact 14 is typically composed of three metal layers: aluminum, nickel/vanadium, and copper. The contact 14 is disc-shaped with a raised perimeter that restricts the lateral flow of the molten solder used to form the solder bump 12. As a result, the overall shape of the solder bump 12 is determined by the size of the contact 14.
While solderable contacts of the type shown in FIG. 2 are widely used in the prior art, the minimum spacing of such contacts is dictated by the required size of the solder bumps and the type of solder deposition process employed. This spacing requirement imposes a minimum limit on the size of the flip chip die, regardless of the die area required for its circuitry. The spacing requirement can also preclude the conversion of an existing die configured for fine pitch wire bonding to a solder bump flip chip of the type shown in FIG. 1.
Alternative approaches to the use of a solderable contact include the use of a solder stop, such as a solder mask or a printed dielectric mask, which covers or alters the conductor in the bump reflow region in order to limit the area over which a solder bump can reflow. However, certain shortcomings exist with this approach that are related to processing costs and accuracy. For example, printed and photoimaged dielectric masks do not provide adequate positional accuracy for certain flip chips, particularly flip chips with fine pitch solder bumps. Furthermore, the cost of obtaining the required accuracy may be prohibitive.
Accordingly, it would be desirable if a solder bump terminal pattern could be employed that did not dictate the size of a flip chip, yet employed solderable contacts that advantageously function to limit the flow of the molten solder bumps during reflow.